System Architect

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Accountabilities: 

• Creates, defines and develops system validation environment and test suites for multi-protocol validation (e.g PCIe, Ethernet, JESD, DP & etc)
• Uses and applies system level tools and techniques to ensure functionality to spec.
• Responsible for the development of methodologies, execution of validation plans, and failures debugging.
• Collaborate with Design, Software and Pre-silicon Validation teams in improving post-silicon test content and methodologies for best coverage.
• You will be involved in multiple protocol IP validation in system level, and required RTL module development to support and improve validation coverage.
• In addition, drives exploration of IP validation methodology, platform and infrastructure enablement to improve process and efficiency.
• Participate in validation plan presentation and enablement of FPGA.

Qualifications:

• BS/MS/PhD Electronic & Electrical Engineering or Equivalent
• 15+ years of industrial experiment working in the FPGA and System Validation.
• Knowledge in FPGA logic design, IP protocol (E.g. PCIe, Eth, DP & Etc)
• Additional knowledge in MAC layer and PHY Layer architecture will be advantageous.
• Familiar with commercial FPGA tools and operation flow (Quartus, Radiant)
• Knowledge in handle logic analyzer/protocol analyzer.
• Must be proficient with C/C++, knowledge of TCL and Qt is preferred
• Must possess independent problem solving skills
• Map/Place/Route experience for FPGA design is preferred
• Must be able to drive projects and lead a discussion
• Strong written and verbal communication skills and the ability to work with multiple groups
• Must be detail oriented with strong customer service skills