Lattice Overview
Lattice Semiconductor (NASDAQ: LSCC) is the global leader in smart connectivity solutions, providing market leading intellectual property and low-power, small form-factor devices that enable more than 8,000 global customers to quickly deliver innovative and differentiated cost and power efficient products.
The Company's broad, end-market exposure solves customer problems across the network from the Edge to the Cloud for clients in consumer electronics, industrial equipment, communications infrastructure, computing and automotive. Our technology, long-standing relationships and commitment to world-class support enables our customers to quickly and easily unleash innovative solutions to create a smart, secure and connected world.
Our control, connect and compute solutions enable the Internet of Things to operate safely, easily and more autonomously at the edge of the network core. While you may not see our products, you are interacting with them all day, every day. We make your experience smarter and better-connected. Join Team Lattice and help us continue to drive innovation that creates a smarter, better-connected world. Together, we enable what’s next.
Job Description
Experience Range: 15+ years of deep expertise in edge AI, with a proven history of shaping company-wide or industry-level technical directions in efficient neural inference across multiple hardware platforms.
As a senior staff-level individual contributor and strategic technical authority, you will set the multi-year vision for Lattice's edge AI capabilities, primarily through sensAI on Lattice FPGAs but extending to influence and provide solutions for broader edge ecosystems (including NXP processors/NPUs and other accelerators).
You will solve the most ambiguous, cross-organizational challenges in ultra-efficient edge inference, drive transformative advancements (next-gen hardware-aware co-design, revolutionary compression paradigms), mentor staff/senior engineers.
Key Responsibilities
Define and champion the 3–5+ year technical vision for edge inference — model architectures, optimization paradigms, compiler/ML hardware co-design, and ecosystem strategy primarily for Lattice sensAI, with extensions to other platforms (e.g., NXP NPUs, Arm-based systems)
Lead high-impact, ambiguous initiatives spanning hardware, compiler, software, and product teams.
Architect and drive adoption of groundbreaking techniques: hardware-aware NAS, quantization, dynamic/sparse inference, automated co-design flows for multi-platform deployment
Serve as technical expert, aligning ML strategy with company business goals, hardware roadmaps (Lattice and partners), and long-term competitive positioning. Mentor staff and senior ML engineers, fostering a culture of technical excellence and innovation in cross-platform edge AI.
Identify and resolve the most complex, organization-spanning bottlenecks in edge inference performance/power/accuracy across Lattice FPGAs and other accelerators.
Own strategic evolution of the sensAI Model Zoo as a flagship industry resource (ecosystem partnerships, standardization, open benchmarks with support for NXP and similar platforms).
Guide creation of advanced R&D prototypes, datasets, and frameworks that shape future sensAI generations and partner integrations.
Required Skills and Qualifications
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