Senior QA Engineer – FPGA Place & Route Validation

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Key Responsibilities:

• Design and execute comprehensive test plans for FPGA P&R workflows, including timing closure, optimization scenarios, and ECO flows.
• Validate functional correctness of P&R algorithms across multiple FPGA device families and design constraints.
• Collaborate with P&R engineers to test new algorithms and provide QA feedback during development.
• Ensure all P&R options and configurations are tested thoroughly from a customer workflow perspective.
• Simulate real-world design flows: synthesis, constraint application, P&R, timing analysis, and bitstream generation.
• Perform regression and stress testing for P&R and ECO features under complex design conditions.
• Automate test cases using scripting languages (Python, Tcl, Shell) for efficiency and scalability.
• Debug complex P&R and ECO issues by analyzing timing reports, routing congestion, ECO application logs, and resource utilization.
• Maintain regression suites and dashboards to monitor P&R performance, ECO stability, and timing closure success rates.
• Provide clear, data-driven reports on validation outcomes, functional correctness, and ECO reliability.