Staff Signal and Power Integrity Engineer

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Lattice is seeking candidates for the position of Staff Signal and Power Integrity Engineer. This is a full-time position located in India.

Accountabilities: 

• Perform pre-layout and post-layout simulation flow.
• Performing DC IR drop and AC impedance simulation.
• Execute SI/PI/EMC design-optimization for chip/package/system integration and electrical performance optimization, e.g., eye diagram, jitter, IR/EM, system-PI, cross-talk, and SSN/SSO.
• Develop system integration design guidelines with SI/PI total solution for advanced packaging technologies (FC/InFO etc).
• Create simulation models and develop simulation methodology for SI/PI design.
• Use simulation and lab data to support design troubleshooting and propose   corrective actions, drive failure analysis, root cause efforts, and design of experiments to resolve problems.
• Explore various design elements including different modules, memories, low/high speed buses, components, their physics of operation, and impacts on system performance.
• Work closely with package design team and testing team to optimize Package and/or SI design based on the simulation data.
• Generate simulation report based on the data with clear Package & SI recommendations.

Qualifications:

• Must have an MS or PhD in Electrical Engineering.
• Qualified candidate must have 5 years or above of recent Signal Integrity experience
• Proved experiences on package level signal and power integrity.
• Package-level system architecture, I/O structures & topologies
• Experience with signal integrity modeling tools, including 3D EM modeling (Ansys HFSS) and simulation (Agilent ADS or similar) software
• Experience with signal and power integrity analysis tools (ex: HSPICE, Sigrity tools, PowerDC etc)
• Communication skills are a must as this person will interact with engineers in different disciplines as well as with members of management.