Key Responsibilities
• Architect datacenter control solutions across compute, storage, and network domains, including BMC, RMC, and rack orchestration.
• Identify and define FPGA attach points for telemetry, power/cooling control, fabric management, and secure boot.
• Shape technical marketing strategy for AI and datacenter platforms—developing MRDs, reference architectures, and partner programs.
• Collaborate with SoC, CPU, DPU, and accelerator vendors to co-design FPGA-enhanced system solutions.
• Engage with CSPs, OEMs, and ODMs to translate requirements into FPGA-based proofs of concept.
• Drive technical narratives that showcase Lattice leadership in control, security, and system orchestration.
• Align with product and engineering teams to ensure design integrity, validation, and roadmap coherence.
• Represent Lattice in OCP, DMTF, and related forums to guide standards and influence ecosystem direction.
Required Qualifications
• BS/MS in Electrical, Computer, or Systems Engineering.
• 12+ years in datacenter hardware architecture, technical marketing, or system design.
• Expertise in platform manageability and control (BMC, RMC, attestation, telemetry).
• Knowledge of datacenter storage, networking, and power systems (PCIe/CXL, NVMe, Ethernet, cooling).
• Familiarity with LTPI, SPDM, PLDM, and other DMTF and OCP standards.
• Proven ability to translate architectures into strategies and drive ecosystem adoption.
• Experience working with hyperscalers, OEMs, or SoC vendors on validation and deployment.
• Excellent communication and executive presentation skills.
Preferred Qualifications
• Experience in rack-scale orchestration, AI cluster, or fabric management.
• Knowledge of FPGA/CPLD integration in control, telemetry, or security roles.
• Understanding of AI server architectures, accelerators, and thermal/power management.
• Published contributions to industry standards or specifications.
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