Packaging Eng 3

Job Locations | PH-Alabang Muntinlupa City
ID
2025-3301
Position Type
Full time

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Responsibilities & Skills

Position Overview

Lattice Semiconductor is seeking a highly skilled and motivated Senior IC Package Designer to join our advanced packaging engineering team. This role is critical in designing and developing cutting-edge integrated circuit (IC) packages that support our low-power programmable solutions. The ideal candidate will have hands-on experience with Cadence/APD tools, a strong understanding of substrate and laminate design, and a collaborative mindset to work across cross-functional teams.

Key Responsibilities

  • Design and Development
    • Create advanced IC package designs including FlipChip BGA, FCCSP, WLCSP, Fan-In/Fan-Out using Cadence/APD tools.
    • Develop bonding diagrams, bump diagrams, and package outline drawings.
    • Ensure designs meet electrical, thermal, and mechanical requirements.
  • Simulation and Analysis
    • Conduct feasibility studies and perform electrical and thermal simulations.
    • Collaborate with SI/PI engineers to validate design integrity.
  • Documentation and Process Management
    • Generate and maintain design specifications and documentation.
    • Manage NRE PO creation and document routing through the Document Management System (DMS).
  • Cross-Functional Collaboration
    • Interface with internal teams (design, test, assembly, reliability) and external partners (substrate vendors, OSATs).
    • Support technical inquiries and provide design guidance throughout the product lifecycle.
  • Project Leadership
    • Lead technical discussions and drive project execution from concept to production.
    • Ensure timely delivery of design milestones and support continuous improvement initiatives.

Preferred Skills & Qualifications

  • Strong background in substrate/laminate design and layout.
  • Familiarity with substrate and assembly manufacturing processes.
  • Deep understanding of IC package types: BGA, CSP, FlipChip, WLCSP, FoWLP.
  • Experience with Signal Integrity (SI) and Power Integrity (PI) simulations.
  • Proficiency in 2D/3D modeling tools such as AutoCAD.
  • Knowledge of electrical simulation tools and design rule checks.

Education & Experience

  • Minimum: Bachelor’s degree in Electronics and Communications Engineering (ECE)Computer Engineering (CoE), or Electrical Engineering (EE).
  • Preferred: Master’s degree in a related field is a strong plus.
  • 3–5 years of hands-on experience in IC package design using Cadence/APD.
  • Experience working in a semiconductor or electronics manufacturing environment is preferred.

About Lattice Semiconductor

Lattice Semiconductor is a global leader in low-power programmable design solutions, specializing in FPGA, CPLD, and power management devices. We are committed to innovation, diversity, and customer success. Our collaborative culture and cutting-edge technology make Lattice a great place to grow your career.

What We Offer

  • Competitive compensation and benefits package
  • Opportunities for professional growth and development
  • Inclusive and innovative work environment
  • Access to state-of-the-art tools and technologies

Options

Sorry the Share function is not working properly at this moment. Please refresh the page and try again later.
Share on your newsfeed