Lattice Semiconductor is seeking a Principal RTL Engineer to join the EDA tools development team in Pune. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn and grow.
Accountabilities:
- Lead the design and development of FPGA debug engine in Lattice EDA suite.
- Architect and refactor the FPGA debug IP and guide the UI team to enhance existing functionality and new features.
- As a principal RTL Engineer, you will work closely with marketing requirements and generate functional architecture and specifications for new FPGA debug IP functionality and guide the QA teams and ensure that implementations match design intent.
- Mentor and guide junior RTL & UI engineers working on FPGA debug IP, fostering a culture of continuous improvement and innovation.
- Maintain high standards of architecture, implementation quality, performance, and reliability.
- Improve development methodologies and processes.
Qualifications
- Master’s in Electrical engineering/Computer engineering or related field with 12+ years of experience in RTL System Design and EDA experience.
- Strong communication skills.
- Expertise in HDL languages (Verilog/System-Verilog and VHDL).
- At least 15 years of Hardware design experience.
- At least 10 years of Hardware Design experience using FPGAs.
- At least 5 years on FPGA debugging methodologies.
- Proficiency in synthesis tools.
- Proficiency in simulation tools from leading EDA vendors.
- Proficiency in testbench/test-vector creation.
- Proficiency in C/C++ , TCL, Python languages.
- Proficiency in protocols such as Serdes interface, Ethernet, PCIe or Memory DDR is required.
Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.
Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.
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