We are seeking an experienced HDL design/verification engineer to design, develop, and enhance the simulation capabilities within Lattice Radiant — Lattice Semiconductor’s official FPGA design tool. You’ll be part of the Lattice Software Radiant team working closely with the hardware developers and QA teams to support simulation flows, help validate new features and ensure seamless integration of simulation engines with Radiant’s toolchain.
Key Responsibilities:
Required Qualifications:
Bachelor’s or Master’s degree in Electronics Engineering, or related field.
Solid experience with hardware description languages (HDLs) and simulation tools (e.g., Modelsim, Synopsis VCS).
Solid understanding of HDL simulation concepts: elaboration, scheduling, waveform generation.
Solid experience in EDA tool development or FPGA simulation frameworks.
Familiarity with Lattice Radiant Software, FPGA architectures, and configuration flows.
Industrial experience in similar field for > 5 years.
Preferred Skills:
Strong analysis and debugging capabilities.
Excellent communication and cross-disciplinary collaboration skills.
What we offer:
Direct impact on the evolution of FPGA development tools and methodology.
Competitive compensation and comprehensive benefits.
A highly collaborative and intellectually driven team environment.
Supportive cross-geo team environment and technical mentorship.
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