Job Summary:
Lattice Semiconductor is seeking a Design Engineer Intern to join the Soft IP team. This role provides a glimpse into our Soft IP development team and process with plenty of opportunities to contribute, learn, and grow.
Objectives:
Introduction to Semiconductor Design and Validation Tools and Processes
Introductory Training and Hands-on activities in RTL coding and scripting
Introductory Training and Hands-on Mini-Project Soft IP Design, IP packaging and HW validation
Required Skills
Basic Coding in any language
Familiarity in Linux Environment
Knowledge in Digital Logic
BS/MS Computer Science, Computer Engineering, Electronics and Electrical Engineering Graduating Students
Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.
Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.
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