Staff Machine Learning Engineer

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

We are seeking a highly motivated Staff design engineer who will be responsible for design and development of RTL for Machine Learning engine. You are responsible to implement ML operators efficiently using resources on low power FPGA.

You need to bring experience in optimizing data path for high throughput and low latency. Good understanding of neural network accelerators and/or DSP processors is essential to be successful in this job.

Requirements Key Skills

• In-depth experience in designing and developing RTL using Verilog, System verilog-HDL.

• Ability to carry out functional simulation using industry standard simulation tools.

• Good understanding of ML operations like convolution, BatchNorm etc

• Experience in image processing and DSP algorithms implementation

• Deep understanding of machine learning, data models to optimally map it with hardware.

• Experience in FPGA/ASIC synthesis flow, timing closure.

• Working knowledge of computer architecture and memory management Experience with C and/or SystemC is a plus

Education and General:

• BE/MTech/PhD in Electronics, Electrical or Computer Engineering

• Minimum of 10 years (8 year for MTech and 5 years for PHD) experience in RTL design

• Independent and self-motivated, capable of executing under dynamic environment and uncertainties

• Innovative, problem solver who likes to come up with newer and better solutions for existing problems

• Good cross team communication and technical documentation desire