Sr EDA SW Dev Engineer

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Lattice is seeking candidates for the position of Sr EDA SW Dev Engineer.  This is a full-time position located in Pune, India.

 

Accountabilities: 

 

• Develop and deliver state-of-art design, architecture and device database and software infrastructure for world-class ease-of-use Lattice FPGA software tool for small, mid-range and large FPGA products.

• Develop software capabilities for next generation of Lattice FPGA products.

• Support and maintain existing Lattice FPGA design tools.

• Learn and contribute to Spec and Plan process - review marketing requirement documents, generate functional specifications and developer unit test plans to ensure quality software.

• Improve development methodologies and processes.

 

Qualifications:

• BS/MS/PhD Electrical Engineering or Computer Science

• 5+ years of experience in large-scale software development for engineering application domains, preferably in FPGA/ASIC Design Automation

• Must be proficient with C++. Modern C++ proficiency is a plus

• Strong background in Software Architecture, object-oriented programming, data structures and algorithms, Design Patterns

• Experience of working on multiple platforms – at least Linux and Windows – is required.

• Knowledge of shell, Tcl or Python scripting is a plus.

• Familiarity with commercial FPGA software tools and design flow is a plus. Knowledge in FPGA logic design is a plus.

• Must be detail oriented and possess independent problem-solving skills. Must be able to drive projects and lead a discussion.

• Strong written and verbal communication skills, and collaboration skill with the ability to work with multiple groups.