Join the winning team! Lattice is looking for a highly motivated and experienced Program Manager to be the key interface between engineering, operations and business teams to drive programs for devices, IP and software tools. The role will require close collaboration with global teams to successfully manage the scope, schedule, risk, reporting, issue resolution and resources of complex FPGA programs. He/she will drive cross functional engagements involving multi-functional teams to establish clear alignment between requirements and engineering priorities, and to deliver successful programs. He/she will employ the best program management practices to facilitate prioritization, planning, stakeholder management and ensure timely commitment delivery. The ideal candidate should have a strong passion to build collaborative relationships with stakeholders and champion collective success.
Candidate can expect to
• Engage regularly with global stakeholders to successfully complete programs per plan
• Discuss and align on program roles, responsibilities, metrics, requirements and deliverables
• Work with engineering teams to translate product requirements/requests into a working plan
• Manage schedule, scope, resource, risks and reporting to drive towards successful delivery
• Drive cross-functional issue resolution per requirements
• Provide regular communication to stakeholders to ensure expectations, updates and decisions are aligned
Candidate profile:
• BS in EE/CE/CS or similar with over 5 years of experience in program management role within the semiconductor or IP industry
• Ability to communicate effectively
• Knowledge in product development cycle (integrated circuit, packaging, validation, qualification, IP and/or software tools)
• Experienced in driving cross‐functional teams to deliver projects with multiple internal/external dependencies and constraints
• Experienced in driving alignment and accountability in program requirements and collaboration
• Track record in delivering products timely with high quality
• PMP would be a plus
• Knowledge/experience in FPGA would be an added advantage
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