DFx/Diagnosis Engineer

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Lattice Semiconductor is seeking a Senior/Staff DFx/Diagnosis Engineer to join the Manufacturing team focused on DFx Design and Diagnosis. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn and grow.

Accountabilities: 

• DFT architecture definition (major in MBIST & Self-Repair (BISR) with Redundancy but not limited to) and test plan development.

• Perform IP level and top level MBIST & BISR integration and verification.

• Supports in design execution such as MBIST Mode timing constraints development and timing closure.

• MBIST DFT tools flow and test methodology development.

• Validating & Debugging Test vectors on ATE during the silicon bring up phase.

• Assisting with silicon failure analysis, diagnostics & yield improvement efforts.

Required Skills

• Bachelor / Master Degree in Electrical & Electronic or equivalent.

• Experience in SoC design/verification with industry tool flows (Synthesis, insertion, simulator, LEC, STA).

• Familiar with verilog, system verilog and Perl/Tcl script.

• Knowledge in advance DFT methodology including ATPG, MBIST, JTAG, high-speed interface test and etc.

• FPGA, ATE test development and post-silicon test debug experience is an added advantage.

• Minimum 5 years relevant working experience for senior position, and 8+ years for staff position.