Design Verification Intern

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Lattice is seeking a highly energetic Design Verification intern to join our high performing team in Penang. As part of Lattice’s Silicon Engineering team you will work with technical staff in verification of next generation Filed Programmable Gate Array (FPGA) products. Intern assignments will provide broad exposure to Lattice’s unique and world-leading FPGA products and an array of advanced software and hardware tools. Interns will experience life in a fast-paced, intellectually challenging and exciting high tech company.
Applications are welcome from all qualified candidates. In order to qualify, applicants must be currently enrolled in a degree program (Undergraduate or Graduate) and be legally authorized to work in the USA without sponsorship for employment visa status.

Accountabilities:

• Verification of latest state of the art FPGA designs
• Assist in automating the verification tasks
• Assist in automating different simulators usage
• Assist in running and debugging block level and fullchip level verification tests
• Develop, modify, and debug verification suites in UVM environment using System Verilog
• Run software tools and verify the results

Responsibilities & Skills:

• Completed minimum three years toward completion of BS or pursuing MS in Electrical Engineering/Computer
• Engineering/Computer Science with GPA ≥ 3.5 in core subjects
• Completed C/C++, Python and Data structure related courses
• Completed or currently pursuing VLSI design or verification related courses. Verification related coarse like System Verilog, UVM etc. will be a plus
• Completed course projects using Verilog/VHDL/System Verilog.
• Strong understanding of electronic design fundamentals.
• Excellent written and verbal communication skills.
• Strong interest in pursuing an engineering career with a fast-paced high technology company.